STS AOE ICP

Description

The Advanced Oxide Etch (AOE) source is a revolutionary design, based on STS' well-established Inductively Coupled Plasma (ICP) technology. The AEO source is originally conceived to overcome the limitations of conventional high density plasma sources for SiO2 deep etch applications. It is also proven to be suitable for deep etching of quartz, pyrex, and fused silica for 4" substrates and 6" substrates by request.

Status

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Tool Owners

  • Tran-Vinh Nguyen

Location

Cleanroom - Pettit

Capabilities

Etch - Dielectrics - Silicon Nitride
Etch - Dielectrics - Silicon Oxide
Etch - Quartz
Etch - Silicon
General Equipment Specification - ICP Systems

Shared Drive

No share drive for this equipment.

Schedule

Schedule Rules:
You can schedule in advance up to 14 days from today
Maximum of 24 hours during peak hours ( Mon-Fri [8AM - 5PM] )
Maximum of 24 hours total per day
You cannot have less than 120 minutes between 2 time blocks.
You are allowed to schedule within the next 8 hours with no penalty. This overrides any conflicting rules listed above.

Usage Rules:

As a precaution, you will be issued a warning if you exceed 8 hours of continuous usage.
You will be suspended and logged out of the equipment if you exceed 12 hours of continuous usage.

You must first log in to see the schedule.

Usage Records

Equipment with Similar Capabilities

Plasma-Therm ICP

An ICP (inductively coupled plasma) etcher (DRIE) can be used to etch a variety of materials. This ICP is equipped with two chambers -- one is dedicated to deep anisotropic silicon (BOSCH process) trench etching and the other is used for silicon dioxide and polymer etching. Wafer sizes 4" and 6" are allowed in the chambers.

Location

Cleanroom - Pettit

STS HRM ICP

The STS HRM is a CMOS-Compatible tool used for integrated MEMS-CMOS processes, and is meant for narrow (<10 micron in width) high aspect-ratio trench etching for 4" or 6" silicon (DRIE) and SOI wafers and a high etch rate. Non-CMOS-compatible materials and masks are NOT allowed in this tool.

Location

Cleanroom - Marcus Inorganic

STS ICP

The STS ICP is a CMOS-compatible tool used for integrated MEMS-CMOS processes, and is meant for narrow (<10 micron in width) high aspect-ratio trench etching (DRIE) in silicon and SOI wafers. This system is used only for etching high aspect-ratio trenches in silicon (BOSCH process) and 4" SOI wafers.

Location

Cleanroom - Pettit

Standard Recipes and Reports

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User Shared Files

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Billing Rates

You are billed the cleanroom hourly rate when logged into this tool, even if you are not logged into a cleanroom.

See our rates for more information.

Service Requests

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Equipment Log

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Training Sessions

Choose from the sessions below or request a new time.

Location Start Time Trainer Reserved Comments