STS AOE ICP

Description

The Advanced Oxide Etch (AOE) source is a revolutionary design, based on STS' well-established Inductively Coupled Plasma (ICP) technology. The AEO source is originally conceived to overcome the limitations of conventional high density plasma sources for SiO2 deep etch applications. It is also proven to be suitable for deep etching of quartz, pyrex, and fused silica for 4" substrates and 6" substrates by request.

Status

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Tool Owners

  • Tran-Vinh Nguyen

Location

Cleanroom - Pettit

Capabilities

Etch - Dielectrics - Silicon Nitride
Etch - Dielectrics - Silicon Oxide
Etch - Quartz
Etch - Silicon
General Equipment Specification - ICP Systems

Shared Drive

No share drive for this equipment.

Schedule

Equipment access control, scheduling, and training is now managed within the Shared User Management System (SUMS)
To schedule time on equipment within SUMS browse to https://sums.gatech.edu/Department/IEN log in, search for equipment, and click & drag to schedule time.

Equipment with Similar Capabilities

STS HRM ICP

The STS HRM is a CMOS-Compatible tool used for integrated MEMS-CMOS processes, and is meant for narrow (<10 micron in width) high aspect-ratio trench etching for 4" or 6" silicon (DRIE) and SOI wafers and a high etch rate. Non-CMOS-compatible materials and masks are NOT allowed in this tool.

Location

Cleanroom - Marcus Inorganic

STS ICP

An ICP (inductively coupled plasma) etcher (DRIE) can be used to etch a variety of materials. This ICP is equipped with two chambers -- one is dedicated to deep anisotropic silicon (BOSCH process) trench etching and the other is used for silicon dioxide and polymer etching. Wafer sizes 4" and 6" are allowed in the chambers.

Location

Cleanroom - Pettit

STS ICP

The STS ICP is a CMOS-compatible tool used for integrated MEMS-CMOS processes, and is meant for narrow (<10 micron in width) high aspect-ratio trench etching (DRIE) in silicon and SOI wafers. This system is used only for etching high aspect-ratio trenches in silicon (BOSCH process) and 4" SOI wafers.

Location

Cleanroom - Pettit

Standard Recipes and Reports

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User Shared Files

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Billing Rates

You are billed the cleanroom hourly rate when logged into this tool, even if you are not logged into a cleanroom.

See our rates for more information.

Service Requests

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Equipment Log

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Training Sessions

Training for the IEN Cleanrooms is now managed within the Shared User Management System. (SUMS)
To get trained for the Cleanrooms, or equipment within the IEN department simply browse to http://sums.gatech.edu/Department/IEN
Log in with your Georgia Tech username and password, then browse to the IEN Equipment Group page to learn new training info.

Cleanroom

The IEN has cleanrooms in the Pettit Microelectronics Research building and the Marcus Nanotechnology Research building. Learn More

Georgia Tech Institute for Electronics and Nanotechnology

The Institute for Electronics and Nanotechnology (IEN) is a Georgia Tech interdisciplinary research institute designed to enhance support for rapidly growing research programs spanning biomedicine, materials, electronics and nanotechnology. Learn More

Visit Georgia Tech IEN

Marcus Nanotechnology Research Center
Georgia Institute of Technology
345 Ferst Drive NW
Atlanta, GA 30318
(404) 894-5100
Pettit Microelectronics Research Building
Georgia Institute of Technology
791 Atlantic Drive
Atlanta, Ga 30332
(404) 894-5100